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Silicon Labs /Series1 /EFR32FG12P /EFR32FG12P231F1024GM68 /CRYPTO0 /CSTATUS

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Interpret as CSTATUS

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31282724232019161512118743000000000000000000000000000000000000000000 (DDATA0)V00 (DDATA0)V10 (SEQPART)SEQPART0 (SEQSKIP)SEQSKIP0SEQIP

V0=DDATA0, V1=DDATA0

Description

Control Status Register

Fields

V0

Selected ALU Operand 0

0 (DDATA0): undefined

1 (DDATA1): undefined

2 (DDATA2): undefined

3 (DDATA3): undefined

4 (DDATA4): undefined

5 (DATA0): undefined

6 (DATA1): undefined

7 (DATA2): undefined
V1

Selected ALU Operand 1

0 (DDATA0): undefined

1 (DDATA1): undefined

2 (DDATA2): undefined

3 (DDATA3): undefined

4 (DDATA4): undefined

5 (DATA0): undefined

6 (DATA1): undefined

7 (DATA2): undefined
SEQPART

Sequence Part
SEQSKIP

Sequence Skip Next Instruction
SEQIP

Sequence Next Instruction Pointer

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data